armv7, beagle: Second SDRAM bank don;t work

since commit 3667cbeed5e3c4067e624e52a916b1ebb02c8f05
on beagle board the second sdram bank didn;t longer
work. Since this patch sdram settings just get copied
from bank a, but CMD_NOP, CMD_PRECHARGE, CMD_AUTOREFRESH
are not executed and after that mr register is also
not updated. This patch adds this for the bank b.

Signed-off-by: Heiko Schocher <[email protected]>
cc: Steve Sakoman <[email protected]>
cc: Sandeep Paulraj <[email protected]>
cc: Wolfgang Denk <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>

diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index c75aa1d11ca69b44573345b93a7599e284242e10..a4979ce61d04762a94cc17e0635b998f559fbbc0 100644 (file)
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -149,6 +149,13 @@ void do_sdrc_init(u32 cs, u32 early)
                        &sdrc_actim_base1->ctrla);
                writel(readl(&sdrc_actim_base0->ctrlb),
                        &sdrc_actim_base1->ctrlb);
+
+               writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+               writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+               writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+               writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+               writel(readl(&sdrc_base->cs[CS0].mr),
+                       &sdrc_base->cs[CS1].mr);
        }
 
        /*